1. Field of the Invention
The present invention relates to an ECL (emitter-coupled logic) circuit, more particularly, to an ECL circuit containing therein a breakdown protecting structure.
2. Description of the Prior Art
In general, an ECL circuit is a form of a current-mode logic circuit in which the emitters of two transistors are connected to a single current-carrying resistor in such a way that only one transistor conducts at a time. The logic state of the output depends on which transistor is conducting. There are various forms of ECL circuits. The present invention particularly refers to an ECL circuit which includes therein a so-called pull-down resistor at the input stage. As is known, the pull-down resistor is useful for positively setting the base voltage of an input transistor at a fixed level in a very simple way, when the input terminal of the ECL circuit is left in the open state. However, contrary to the above, because of the presence of the pull-down resistor, the ECL circuit has a shortcoming in that the above-mentioned input transistor is often left in a breakdown state when the voltage level of a low voltage power source (V.sub.EE) is changed in order to achieve a commercially specified test or a conventional accelerated aging test. It should be noted that once the transistor is left in the above-mentioned breakdown state, the common-emitter static forward current transfer ratio, that is h.sub.FE, of the transistor is considerably reduced, and accordingly the base current thereof is increased. It is also known that the transistor having such a reduced h.sub.FE can no longer operate at a high operating speed.
The aforesaid reduction of h.sub.FE, due to the occurrence of the above-mentioned breakdown, is not so significant in the case of currently used transistors. This is because no such breakdown is expected to occur in currently used transistors. However, the reduction of h.sub.FE, due to the occurrence of the beakdown, is serious in the case of transistors contained in the ECL circuit. The ECL circuit, as is widely known, is very useful for constructing high-speed operating logic gates. Accordingly, in the case of the transistors in the ECL circuit, the diffusion depth at the base of each of the transistors must be made considerably shallow so as to improve the frequency characteristic thereof. However, a base with such a shallow diffusion depth, in each transistor in the ECL circuit, cannot withstand the breakdown. Thereby, in the ECL circuit, the aforesaid reduction of h.sub.FE is liable to occur, which means that the base current of the input transistor increases. In addition, high-speed operation can no longer be attained because, as was previously explained, a transistor having a reduced h.sub.FE can no longer operate at a high operating speed.